The POWER6 processor is a result of a five-year R&D period, is composed of 790 million transistors and is built using IBM’s 65nm process technology. IBM scientists targeted the way instructions are executed inside the chip to improve performance. For example, in the POWER6, the number of pipeline stages – the chunks of operations that must be completed in a single cycle of clock time – are kept static, but each stage is made faster, removing unnecessary work and doing more in parallel. As a result, execution time is reduced.

Earlier this year, IBM hinted that its new POWER6 architecture may hit frequencies higher than 5 GHz.

The POWER6 chip has a total cache size of 8 MB per chip – four times the POWER5 chip – to keep pace with the processor bandwidth. With 300 GB/s on tap, IBM boasts that its processor has so much bandwidth that the POWER6 chip could download the entire iTunes catalog in about 60 seconds. IBM believes that it has designed the POWER6 chip with a balanced amount of bandwidth and processing power.

“Like the victory of IBM’s Deep Blue chess-playing supercomputer 10 years ago this month, the debut of POWER6 processor-based systems proves that relentless innovation brings ‘impossible’ goals within reach,” said Bill Zeitler, senior vice president, IBM Systems and Technology Group. “The POWER6 processor forges blazing performance and energy conservation technologies into a single piece of silicon, driving unprecedented business value for our customers.”

To facilitate the lower energy demands of the new chip, the POWER6 designers separated circuits that can’t support low voltage operation onto their own power supply “rails,” allowing IBM to dramatically reduce power for the rest of the chip. IBM engineers also used a new method of chip design that enables POWER6 to operate at low voltages, allowing the same chip to be used in low power blade environments as well as large, high-performance symmetric multiprocessing machines.